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EDN, May 26, 2011

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BAKER'S BEST BY BONNIE BAKER H INPUT C_PIN C_COMP SILICON VSS CAPACITANCE VSS VSS VSS Figure 1 An input buffer for an IBIS model includes the package parasitics, electrostat- ic-discharge cells, and input gate. VDD PACKAGE FROM INTERNAL CIRCUIT EDN 110526 Bonnie Figure 1 Diane R_PIN L_PIN OUTPUT C_COMP SILICON VSS VSS CAPACITANCE VSS Figure 2 An output buffer for an IBIS model has the package parasitics and output gate. C_PIN ESD Beyond the data sheet with IBIS ave you ever found that a product improvement or upgrade turns out to be not what you need? For instance, imagine that you are trying to purchase a vehicle in Arizona. The sales rep- resentative tells you that the car will do anything and every- thing. Aſter all, it is new and improved. You would expect the car to have a standard air-conditioning unit because Arizona is extremely hot, right? But what if it doesn't? You can compare this situation to studying a new product's data sheet. You may think that the product offers everything you want, but the nuances in the specs may come back to bite you. As you begin your project and attempt PACKAGE ESD L_PIN R_PIN TO INTERNAL CIRCUIT to design a PCB (printed-circuit board), for example, you may find that the data sheet omits some of the information you need. You can tackle this problem by either asking the manufacturer for the information or augmenting the VDD VDD data sheet with the product's simula- tion model. As you begin to tackle your PCB design, you must address signal-integrity issues with your digital pins. You will need basic signal-integrity elements, such as the input and output capaci- tance of the digital ports. The product's data sheet may not list this small detail. If it doesn't, you can measure a product sample. Better yet, you can look into the IBIS (input/output-buffer-information- specification) model. In an IBIS model, the pin capaci- tance comprises the C_pin package capacitance plus the C_comp buffer capacitance (figures 1 and 2). The [Pin] keyword relates to a package, and the component, manufacturer, and pack- age keywords above the [Pin] keyword describe the selected package. You will find the package capacitance in the [Pin] keyword table as it relates to your pin of interest. The remainder of this arti- cle uses the tsc2020.ibs model, which you can access online at www.edn. com/110526bonnie. If you add the C_pin value to the C_comp value, you can derive this buffer's input capacitance in a tristate configuration. In this example, the total input capacitance of the TSC2020 SDA pin is 0.17059 pF plus 2.7972710 pF, or approximately 2.97 pF. If the manufacturer of the product that you are considering is touting that product as new and improved, there may be more information on that prod- uct than meets the eye in your first evaluation. If you are frustrated about information missing from the standard product data sheet, take a look at the tools that surround that product.EDN REFERENCES 1 tsc2020.ibs IBIS model, slom021, Texas Instruments, December 2010, http://bit.ly/k6N5DF. 2 "TSC2020 Analog Matrix Touch Screen Controller with I2 C Serial Interface for 3×5 Array, SBAS536B," Texas Instru- ments, March 2011, http://bit.ly/eIBtH1. 3 IBIS (I/O Buffer Information Specifi- cation), Version 5.0, IBIS Open Forum, Aug 29, 2008, http://bit.ly/eDCyDh. 22 EDN | MAY 26, 2011

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